3D Workspace
Home
Assets
Affiliate Program
Creator Program
Sign up/Log in
?
Upgrade
DCC Bridge
Anonymous1780291407
06-01 05:23
Model Name
renn-rv accelerator 3d model
Tags
architecture
concept art
stylized
Prompt
Create a 3D infographic model visualizing the ReNN-RV accelerator architecture from this research paper. Include: 1. A central 2D PE (Processing Element) array - specifically a 10x10 grid of colored blocks representing the RePE units, with a pulsing highlight showing "run-time reconfiguration" 2. Three distinct color-coded pipeline stages flowing left-to-right: - FETCH-DECODE stage (blue) - labeled "FetDec Stage" with instruction FIFO and decoder - EXECUTE stage (green) - labeled "Exec Stage" with instruction dispatcher showing three paths: Micro Control, Inter-layer Config, Intra-layer Compute - WRITE-BACK stage (orange) - labeled "WB Stage" with TRS (Temporary Result Storage) buffer showing double buffering 3. On the left side: A RISC-V CPU core sending custom ISA instructions via AXI4-Lite interface (purple connection lines) 4. Memory components surrounding the PE array: - Shared BRAM (yellow block) - Ping-pong buffer (two alternating storage bins) - Per-column
Detailed Info
Related Models
Enter invite code
Enter invite code to get credits!
Anonymous1780291407
Anonymous1780291407